1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device including a screening step under a state of a wafer and a semiconductor device.
2. Description of the Related Art
In some cases, a step of screening defective products is introduced in a function verification test for semiconductor devices including MIS transistors and MIS capacitor elements, for example, semiconductor integrated circuits, after at least the semiconductor devices are finished on semiconductor substrates in order to sort and remove semiconductor devices including an initial defect and a potential defect due to a defect in a gate insulating film.
For example, a semiconductor device including an MIS transistor and a capacitor element having a gate insulating film as a dielectric body, which are formed on a semiconductor substrate processed into a wafer having a thin disc-shape, is formed by a known technology, and is brought into a state in which the resultant semiconductor device at least functions as a desired semiconductor device.
Subsequently, under a state of the wafer having formed thereon a plurality of semiconductor devices or after being processed into individual semiconductor devices, the semiconductor device is subjected to an electrical characteristic test to verify whether the semiconductor device achieves desired functions, and is sorted as a non-defective product or a defective product. One of the items included in the electrical characteristic test is the above-mentioned screening of initial defects and potential defects due to a defect in a gate insulating film.
At this time, an MIS transistor and an MIS capacitor element in which the insulating property of the gate insulating film is impaired due to an apparent defect at the time when the semiconductor device is finished cannot achieve the desired function of the element due to a high leakage current of the element including the defect. It is therefore possible to cause such defects of the MIS transistor and the MIS capacitor element to appear as initial defects to screen the semiconductor device in an electrical characteristic function test of the semiconductor device.
Meanwhile, the semiconductor device is determined as non-defective in the above-mentioned temporary electrical characteristic function test if the insulating property of the gate insulating film is scarcely maintained at the time when the semiconductor device is finished and defect of the MIS transistor or the MIS capacitor element does not appear as initial defects, even though the semiconductor device includes an MIS transistor and an MIS capacitor element that include, for example, a crystal defect in the semiconductor substrate, a local thinning of the insulating film due to a defect in a step before or after the gate insulating film forming step, or a contaminated portion in the insulating film. However, the semiconductor device does not have an essentially required quality, for example, an insulating film ensuring a required insulation withstand voltage and a required lifetime, and hence it is highly likely that the semiconductor device includes a potential defect that is to appear in an actual use after shipment of the product.
In order to also screen such a semiconductor device including a potential defect before shipment, a burn-in test in which a load larger than that applied during an actual operation is applied to accelerate a time period required by the semiconductor device to result in a failure is performed, for example, under a high temperature and under a relatively high power supply voltage, for a certain time period to destruct the low-quality gate insulating film, to thereby show the semiconductor device is defective and worth removing (see, for example, Japanese Patent Application Laid-open No. H 05-74898).
However, the method of manufacturing a semiconductor device described in Japanese Patent Application Laid-open No. H 05-74898 has the following drawbacks.
(1) The screening is performed for each of the individual semiconductor devices after the wafer process, and hence the time required for the electrical characteristic test for the semiconductor device increases.
(2) An applicable voltage decreases due to the limitation on the breakdown voltage, for example, junction breakdown voltage between a source and a drain, of the MIS transistor included in the finished semiconductor device, and hence application of a long period of time is required due to insufficient electric field acceleration during screening, or the potential defect is not evoked due to insufficient screening.
(3) When a lot of defects are detected through the screening, it is concerned that those defects are not just point defects but are due to deterioration or an abnormality of the quality of the gate insulating film itself due to defects in the manufacturing steps. However, the removed defective products are finished semiconductor devices, and hence a failure cost is increased. In addition, defects appear in finished products, and hence defects in the manufacturing steps are noticed with some delay. As a result, it may be continued to manufacture defective products during that period.